1. Field of the Invention
The present invention relates to an apparatus and method for measuring RF (radio frequency) impedance of a semiconductor package substrate.
2. Description of the Related Art
Operation speed of a semiconductor device has been increasing rapidly in recent years, and high frequency characteristics of a semiconductor package substrate have been improved accordingly on which the semiconductor device is mounted. During this progress, a new unexpected problem is caused in the measurement of RF impedance (S-parameter) of the semiconductor package substrate at a test adjustment stage, because of the demand of higher characterization frequency for the semiconductor package substrate.
FIG. 1 shows a conventional method for measuring the RF impedance (S-parameter) of a power source line in a package substrate 105. Referring to FIG. 1, a package substrate 105 is mounted on a substrate 110 such as a printed circuit board through solder balls. In this case, it is desired to measure the S-parameter between a power source terminal 107 on the upper (front) surface of the package substrate 105 and a power source terminal 106 on the back surface of the package substrate 105 by directly contacting an RF probe #2 103 and an RF probe #1 102 to the respective terminals. However, the back surface of the package substrate 105 is usually mounted on the printed circuit board. For this reason, it is impossible to contact the RF probe #1 102 directly to the back surface of the package substrate 105. Therefore, a signal probe 102a of the RF probe #1 102 is contacted to a power source terminal 108 on the mounting substrate 110 which is connected to the power source terminal 106 on the back surface of the power source terminal 105, and the RF impedance (S-parameter) is measured between the signal probes 102a and 103a of the RF probe #2 103 that is in contact with the power source terminal 107 on the upper surface of the package substrate 105. Another measurement is also carried out for the S-parameter of the power source line 112 on the mounting substrate 110. A GND probe 102b of the RF probe #1 102 is contacted with a GND terminal 109 on the printed circuit board 110, and a GND probe 103b of the RF probe #2 103 is contacted with a GND terminal 113 on the upper surface of the package substrate 105. Since the package substrate 105 and the mounting substrate 110 are connected in series, the S-parameters measured in the above manner are converted into Z-parameters so that the Z-parameter of the package substrate can be obtained as follows when the z-parameter of the package substrate 105, the z-parameter of the mounting substrate 110 and an overall Z-parameter are Z0, Z1, and Z, respectively.Z=Z0+Z1Accordingly,Z0=Z−Z1Then, the Z-parameter Z0 is converted into an S or Y-parameter as needed, and an equivalent circuit is extracted.
In conjunction with the above description, Japanese Laid Open Patent Application (JP-P2003-43091A) discloses a substrate testing apparatus. In this conventional example, the substrate testing apparatus measures a resistance value of an interconnection net between a bump provided on the front surface of a substrate and a terminal provided on the back surface of the substrate by using a four-terminal method.
Also, Japanese Laid Open Patent Application (JP-P2001-153909A) discloses a substrate testing apparatus, a substrate manufacturing method, and a substrate with bump. In this conventional example, the substrate testing apparatus includes a plurality of first terminal portions arrayed and formed in 2-dimensional manner on one of substrate planes of a substrate body. A plurality of second terminal portions corresponding to the first terminal portions are arrayed and formed in the 2-dimensional manner on the other substrate plane of the board body. The first terminal portions are respectively connected to the corresponding second portions by using an interconnection net including via-contacts. The substrate testing apparatus includes an electrical current probe set and a voltage measuring probe set. In the above sets, a first measuring probe group has a plurality of first measuring probes arranged in the 2-dimensional manner and detachably contacting the first terminal portions. In an electrical current probe set and a voltage measuring probe set, a second measuring probe is selectively and detachably made to contact any of the second terminal portions. The first measuring probe group is connected with the first terminal portions and the second measuring probe is connected with the second terminal portion corresponding to the interconnection net as a measurement target. In this state, measurement current is supplied to the interconnection net from the electric current probe set, and a data reflecting a resistance value specific to the interconnection net is generated based on an applied voltage to the interconnection net measured by the voltage measuring probe set. The generated data is compared with a reference data defined for the interconnection net and the interconnection net is determined based on the comparing result.
Also, Japanese Laid Open Patent Application (JP-A-Heisei 11-148951A) discloses a substrate testing apparatus, a substrate manufacturing method, and a substrate with bumps. In the substrate testing apparatus of this conventional example, a printed circuit board is provided with electrodes connected a power source and ground of a semiconductor device mounted on the printed circuit board, and a high frequency connector, and the high frequency connector and the electrodes are connected by interconnections.